1. Field of the Invention
The present invention generally relates to serializer/deserializer integrated circuits with multiple high-speed data ports, and more particularly to a serializer and deserializer chip that includes the functionality to switch between multiple high-speed data ports.
2. Related Art
High-speed data links transmit data from one location to another over transmission lines. These data links can include serializer data links (i.e., SERDES) that receive data in a parallel format and convert the data to a serial format for high-speed transmission, and deserializer data links (i.e., SERDES) that receive data in a serial format and convert the data to a parallel format. SERDES data links can be used for communicating data through a backplane in a communications system (e.g., Tyco Backplane 16 or 30-inch trace).
In a high-speed back plane configuration, it is often desirable to switch between multiple SERDES links. In other words, it is often desirable to switch between any one of multiple SERDES links to another SERDES link, and to do so in a low power configuration on a single integrated circuit.